40G/100G Functions¶

sth::pcs_error_config¶

Purpose¶

Spirent Extension (for Spirent HLTAPI only).

Configures the error mask for the 64/66B lane marker and data block on the specified Physical Coding Sublayer (PCS) lane. PCS is common to two families (40 Gb/s and 100 Gb/s) of Physical Layer implementations, known as 40GBASE-R and 100GBASE-R, both of which are based on a 64B/66B code. The 64B/66B code supports transmission of data and control characters, while maintaining robust error detection. Data distribution is introduced to support multiple lanes in the physical layer (4 lanes for 40GBASE-R and 20 lanes for 100GBASE-R). Part of the distribution includes the periodic insertion of an alignment marker, which allows the receive PCS to align data from multiple lanes.

Using the configured error mask, Spirent HLTAPI performs an XOR operation on the 64/66B lane marker and data block. The key in a hexadecimal or binary mask where a one in the binary indicates an error will be inserted and a zero indicates the bit will be left as is.

Synopsis¶

Note

M indicates that the argument is Mandatory .

sth::pcs_error_config
   [-port_handle <port_handle>  M]
   [-burst_count <1 - 0x3fffffffffff>]
   [-burst_interval <integer>]
   [-burst_length <1 - 0xffffff>]
   [-continuous_mode {LANE_MARKERS_ONLY | LANE_MARKERS_AND_PAYLOAD}]
   [-error_insertion_mode {LANE_MARKERS_ONLY | LANE_MARKERS_AND_PAYLOAD}]
   [-lane_enable <Boolean_list>
   [-sync_header <0 - 3>]
   [-marker0  <0 - 255>]
   [-bip3 <0 - 255>]
   [-marker4 <0 - 255>]
   [-marker5 <0 - 255>]
   [-marker6 <0 - 255>]
   [-bip7 <0 - 255>]

Arguments¶

-port_handle¶: Specifies the port on which the error mask will be configured. This argument is Mandatory .

-burst_count¶: Number of error bursts. This argument is only valid when -continuous_mode is set to false. Possible values range from 1 to 0x3fffffffffff. The default is 1.

-burst_interval¶: Number of blocks between error bursts. This argument is only valid when -continuous_mode is set to false. The default value is 1.

-burst_length¶: Number of sequential errored blocks in each burst. This argument is only valid when -continuous_mode is set to false. Possible values range from 1 to 0xffffff. The default is 1.

-continuous_mode¶: Determines whether the PCS error insertion is continuous or not. Possible values are true (continuous) and false (not continuous). The default is true.

-error_insertion_mode¶

Determines the error insertion mode. Possible Values are described below:

LANE_MARKERS_ONLY           Only alignment markers are corrupted
                            upon insertion

LANE_MARKERS_AND_PAYLOAD    Both alignment markers and payload are
                            corrupted upon insertion

The default value is LANE_MARKERS_ONLY

-lane_enable¶

Boolean flags to individually enable/disable each of the PCS lanes. The value is a 4-Boolean list for 40GBASE-R, and a 20-Boolean list for 100GBASE-R. For example:

-lane_enable {TRUE FALSE FALSE TRUE FALSE FALSE FALSE FALSE FALSE \
            FALSE FALSE FALSE FALSE FALSE FALSE FALSE FALSE \
            FALSE FALSE FALSE}\

-sync_header¶: The 2-bit sync header in the alignment marker bytes (to corrupt). The alignment marker has the form of a specially defined 66-bit block with a control block Sync header. The transmitters periodically insert alignment markers simultaneously on each PCS lane after the transmission of every 16,383 blocks of data and control. A non-zero value for any bit indicates the bit will be flipped (corrupted) upon transmission. Possible values range from 0 to 3. The default is 0.

-marker0¶: Marker 0 in the alignment marker bytes (to corrupt). The M bytes (-marker0 - -marker7) contain specific values that identify each lane from 0 to 19. A non-zero value for any bit indicates that the bit will be flipped (corrupted) upon transmission. Possible values range from 0 to 255. The default is 0.

-marker1¶: Marker 1 in the alignment marker bytes (to corrupt). A non-zero value for any bit indicates the bit will be flipped (corrupted) upon transmission. Possible values range from 0 to 255. The default is 0.

-marker2¶: Marker 2 in the alignment marker bytes (to corrupt). A non-zero value for any bit indicates the bit will be flipped (corrupted) upon transmission. Possible values range from 0 to 255. The default is 0.

-bip3¶: The first Bit Interleaved Parity (BIP) field in the alignment marker bytes (to corrupt). BIP contains a parity check calculated over the bits from the previously inserted alignment marker and all the subsequently transmitted blocks up to the current marker. A non-zero value for any bit indicates the bit will be flipped (corrupted) upon transmission. Possible values range from 0 to 255. The default is 0.

-marker4¶: Marker 4 in the alignment marker bytes (to corrupt). A non-zero value for any bit indicates the bit will be flipped (corrupted) upon transmission. Possible values range from 0 to 255. The default is 0.

-marker5¶: Marker 5 in the alignment marker bytes (to corrupt). Non-zero value for any bit indicates the bit will be flipped (corrupted) upon transmission. Possible values range from 0 to 255. The default is 0.

-marker6¶: Marker 6 in the alignment marker bytes (to corrupt). Non-zero value for any bit indicates the bit will be flipped (corrupted) upon transmission. Possible values range from 0 to 255. The default is 0.

-bip7¶: The second BIP field in the alignment marker bytes (to corrupt). This BIP maintains line balancing. Non-zero value for any bit indicates the bit will be flipped (corrupted) upon transmission. Possible values range from 0 to 255. The default is 0.

Arguments Unsupported by Save as HLTAPI¶

This function is currently not supported by Save to HLTAPI. To test with this function, you must configure it manually in the generated Spirent HLTAPI scripts.

Return Values¶

Depending on the specific language that HLTAPI uses, the function returns a keyed list/dictionary/hash (See Introduction for more information on return value formats) using the following keys (with corresponding data):

handle     Identifies the handle of the PCS error insertion configuration

status     Success (1) or failure (0) of the operation

log        An error message (if the operation failed)

Description¶

The sth::pcs_error_config function configures the error mask for the 64/66B lane marker and data block on the specified PCS lane. Use -port_handle to specify the port on which you want to configure the error mask.

Using the configured error mask, Spirent HLTAPI performs an XOR operation on the 64/66B lane marker and data block. The key in a hexadecimal or binary mask where a one in the binary indicates an error will be inserted and a zero indicates the bit will be left as is.

Examples¶

To configure 40G PCS error insertion:

set pcs_err_config [sth::pcs_error_config\
        -port_handle         $port1\
        -continuous_mode     false\
        -lane_enable         {TRUE FALSE FALSE TRUE}\
        -sync_header         1\
        -burst_count         10]

Sample Output:

{{status 1}{handle pcserrorinsertionconfig1}}

To configure 100G PCS error insertion:

set pcs_err_config [sth::pcs_error_config\
            -port_handle         $port1\
            -continuous_mode    false\
            -lane_enable        {TRUE FALSE FALSE TRUE FALSE FALSE FALSE \
                                FALSE FALSE FALSE FALSE FALSE FALSE FALSE \
                                FALSE FALSE FALSE FALSE FALSE FALSE}\
            -sync_header        1\
            -burst_count        10]

Sample Output:

{{status 1}{handle pcserrorinsertionconfig1}}

sth::pcs_error_control¶

Purpose¶

Spirent Extension (for Spirent HLTAPI only).

Starts or stops the configured PCS error insertion

Synopsis¶

Note

M indicates that the argument is Mandatory .

sth::pcs_error_control
   [-port_handle <port_handle>  M]
   [-action {start | stop}  M]

Arguments¶

-port_handle¶: Specifies the port handle on which you want to start or stop the PCS error insertion. This argument is Mandatory .

-action¶: Specifies the action to perform. Possible values are start and stop. This argument is Mandatory .

Return Values¶

Depending on the specific language that HLTAPI uses, the function returns a keyed list/dictionary/hash (See Introduction for more information on return value formats) using the following keys (with corresponding data):

status Success (1) or failure (0) of the operation

log An error message (if the operation failed)

Description¶

The sth::pcs_error_control function starts or stops the configured PCS error insertion. Use the -action argument to specify the action to perform. (See the -action argument for information about the actions.)

Examples¶

To start the PCS error insertion:

set ctrl_ret [sth::pcs_error_control \
       -action start \
       -port_handle $port1]

sth::random_error_config¶

Purpose¶

Spirent Extension (for Spirent HLTAPI only).

Configures pseudo-random bit stream (PRBS) error insertion. PRBS error insertion operates at the Physical Medium Attachment (PMA) sublayer, using an unframed PRBS per lane to determine if your 40/100 Gbps optical transceivers function correctly.

Synopsis¶

Note

M indicates that the argument is Mandatory .

sth::random_error_config
   [-port_handle <port_handle>  M]
   [-lane_enable <Boolean_list>]
   [-rate <0.00000000001 - 0.1>]

Arguments¶

-port_handle¶: Specifies the port handle on which the PRBS error insertion will be configured. This argument is Mandatory .

-lane_enable¶

Boolean flags to individually enable each of the PMA lanes for PRBS random error insertion. The value is a 4-Boolean list for 40G, and a 10-Boolean list for for 100G. For example:

-lane_enable {TRUE FALSE FALSE TRUE FALSE FALSE FALSE\
               FALSE FALSE FALSE}\

-rate¶: PRBS random error insertion rate. Possible values range from 0.00000000001 to 0.1. The default value is 0.000000001.

Arguments Unsupported by Save as HLTAPI¶

The sth::random_error_config function is currently not supported by Save to HLTAPI. To test with this function, you must configure it manually in the generated Spirent HLTAPI scripts.

Return Values¶

Depending on the specific language that HLTAPI uses, the function returns a keyed list/dictionary/hash (See Introduction for more information on return value formats) using the following keys (with corresponding data):

handle     Identifies the handle of the random error insertion configuration

status     Success (1) or failure (0) of the operation

log        An error message (if the operation failed)

Description¶

The sth::random_error_config function configures the(PRBS) error insertion on the specified 40G/100G port. Use -port_handle to specify the port on which you want to configure random error insertion.

Examples¶

To configure 40G random error insertion:

set random_err_config [sth::random_error_config\
             -port_handle $port2\
             -lane_enable {TRUE FALSE FALSE TRUE}\
              -rate 0.000001]

Sample Output:

{{status 1}{handle randomerrorinsertionconfig1}}

To configure 100G random error insertion:

set random_err_config [sth::random_error_config\
            -port_handle     $port2\
            -lane_enable     {TRUE FALSE FALSE TRUE FALSE FALSE FALSE\
                            FALSE FALSE FALSE}\
            -rate             0.000001]

Sample Output:

{{status 1}{handle randomerrorinsertionconfig1}}

sth::random_error_control¶

Purpose¶

Spirent Extension (for Spirent HLTAPI only).

A Spirent Extension created to start or stop injecting random errors on the high speed fiber interface

Synopsis¶

Note

M indicates that the argument is Mandatory .

sth::random_error_control
  [-port_handle <port_handle>  M]
  [-action {start | stop}  M]

Arguments¶

-port_handle¶: Specifies the port handle on which you want to start or stop the random error insertion. This argument is Mandatory .

-action¶: Specifies the action to perform. Possible values are start and stop. This argument is Mandatory .

Return Values¶

Depending on the specific language that HLTAPI uses, the function returns a keyed list/dictionary/hash (See Introduction for more information on return value formats) using the following keys (with corresponding data):

status: Success (1) or failure (0) of the operation
log: An error message (if the operation failed)

Description¶

The sth::pcs_error_control function starts or stops the configured random error insertion. Use the -action argument to specify the action to perform. (See the -action argument description for information about the actions.)

Examples¶

Sample Input:

set ctrl_ret [sth::random_error_control \
       -action start \
       -port_handle $port1]

sth::forty_hundred_gig_l1_results¶

Purpose¶

Spirent Extension (for Spirent HLTAPI only).

A Spirent Extension created to return statistics for 40G/100G testing

Synopsis¶

sth::forty_hundred_gig_l1_results

[-port_handle <port_handle> [-type {pcs | pcs_lane | pma_lane}] [-mode {port | lanes | all}

Arguments¶

-port_handle¶: Specifies the port handle on which the results will be returned. If not specified, the results on all ports will be returned.

-type¶

Specifies the type of results to be returned Possible values are:

pcs              Port aggregated PCS results
pcs_lane        PCS lanes results
pma_lane        PMA lanes results

The default value is pcs.

-mode¶

Specify the results mode. Possible values are:

port        Returns port-level results
lanes      Returns lane-level results
all        Returns all statistics

The default value is port. If -type is set to pcs, no lane-level results will be returned.

Description¶

The sth::forty_hundred_gig_l1_results function returns statistics for 40G/100G testing. Use -type to specify the type of the results to be returned. Use -mode to specify the scope of the results. (See the description of -type and -mode for more details)

Return Values¶

Depending on the specific language that HLTAPI uses, the function returns a keyed list/dictionary/hash (See Introduction for more information on return value formats) using the following keys (with corresponding data):

status             Success (1) or failure (0) of the operation
log                An error message (if the operation failed)

The following keys are returned when you specify -type pcs. The results for each type of error contain four keys:

*errors - Number of errors
*errorrate - Rate of errors per second
*errorserr - Number of errored seconds
*errorslastsec - Number of errors in the previous second

  Key                            Error Description

port_pcs_bip8errors               BIP-8 code errors
port_pcs_bip8errorrate
port_pcs_bip8errorserr
port_pcs_bip8errorslastsec

port_pcs_consecerrors            Four consecutive PCS lane marker errors occurred
port_pcs_consecerrorrate         in the lane
port_pcs_consecerrorserr
port_pcs_consecerrorslastsec

port_pcs_lengtherrors            PCS lane markers were not 16,383 data blocks apart
port_pcs_lengtherrorrate
port_pcs_lengtherrorserr
port_pcs_lengtherrorslastsec

port_pcs_markererrors           An incorrectly formed PCS lane marker word was
port_pcs_markererrorrate        detected in the respective lane
port_pcs_markererrorserr
port_pcs_markererrorslastsec

port_pcs_sherrors                One or more bad sync headers were detected in the
port_pcs_sherrorrate             most recent sampling interval
port_pcs_sherrorserr
port_pcs_sherrorslastsec

The following keys are returned when you specify -type pcs_lane. The results for each type of error contain four keys:

*errors - Number of errors
*errorrate - Rate of errors per second
*errorserr - Number of errored seconds
*errorslastsec - Number of errors in the previous second

   Key                                  Error Description

port_pcs_lane_bip8errors                BIP-8 code errors
port_pcs_lane_bip8errorrate
port_pcs_lane_bip8errorserr

port_pcs_lane_bip8errorslastsec

port_pcs_lane_consecerrors              Four consecutive PCS lane marker errors
port_pcs_lane_consecerrorrate           occurred in the lane
port_pcs_lane_consecerrorserr
port_pcs_lane_consecerrorslastsec

port_pcs_lane_lengtherrors              PCS lane markers were not 16,383 data
port_pcs_lane_lengtherrorrate           blocks apart
port_pcs_lane_lengtherrorserr
port_pcs_lane_lengtherrorslastsec


port_pcs_lane_markererrors              An incorrectly formed PCS lane marker word
port_pcs_lane_markererrorrate           was detected in the respective lane
port_pcs_lane_markererrorserr
port_pcs_lane_markererrorslastsec

port_pcs_lane_sherrors                  One or more bad sync headers were detected
port_pcs_lane_sherrorrate               in the most recent sampling interval
port_pcs_lane_sherrorserr
port_pcs_lane_sherrorslastsec

The following keys are returned when you specify -type pma_lane:

port_pma_lane_bererrors             Number of bit errors
port_pma_lane_bererrorrate          Bit error rate
port_pma_lane_bersync               Number of seconds the lane was in sync
port_pma_lane_berunsync             Number of seconds the lane was not in sync
port_pma_lane_rxprbspattern         The PRBS pattern

Examples¶

To return port level PCS results:

set results [::sth::forty_hundred_gig_l1_results]

Sample Output:

{result_count 2} {port1 {{port {{port_name {10.61.33.240-6-1 //6/1}}
{port_pcs_bip8errorrate 0.085} {port_pcs_bip8errors 54} {port_pcs_bip8errorserr
12} {port_pcs_bip8errorslastsec 0} {port_pcs_consecerrorrate 1.321}
{port_pcs_consecerrors 843} {port_pcs_consecerrorserr 29}
{port_pcs_consecerrorslastsec 0} {port_pcs_lengtherrorrate 0.232}
{port_pcs_lengtherrors 148} {port_pcs_lengtherrorserr 12}
{port_pcs_lengtherrorslastsec 0} {port_pcs_markererrorrate 10.063}
{port_pcs_markererrors 6420} {port_pcs_markererrorserr 50}
{port_pcs_markererrorslastsec 0} {port_pcs_sherrorrate 24589.521}
{port_pcs_sherrors 15688113} {port_pcs_sherrorserr 102} {port_pcs_sherrorslastsec
0} {port_pcs_syncerrorrate 10.011} {port_pcs_syncerrors 6387}
{port_pcs_syncerrorserr 112} {port_pcs_syncerrorslastsec 0}}}}}
{port2 {{port {{port_name {10.61.33.240-6-3//6/3}} {port_pcs_bip8errorrate 0.653}
{port_pcs_bip8errors 295} {port_pcs_bip8errorserr 3} {port_pcs_bip8errorslastsec
0} {port_pcs_consecerrorrate 0.42} {port_pcs_consecerrors 190}
{port_pcs_consecerrorserr 3} {port_pcs_consecerrorslastsec 0}
{port_pcs_lengtherrorrate 0.383} {port_pcs_lengtherrors 173}
{port_pcs_lengtherrorserr 2} {port_pcs_lengtherrorslastsec 0}
{port_pcs_markererrorrate 0.655} {port_pcs_markererrors 296}
{port_pcs_markererrorserr 3} {port_pcs_markererrorslastsec 0}
{port_pcs_sherrorrate 411.449} {port_pcs_sherrors 185975} {port_pcs_sherrorserr
4} {port_pcs_sherrorslastsec 0} {port_pcs_syncerrorrate 0.221}
{port_pcs_syncerrors 100} {port_pcs_syncerrorserr 4} {port_pcs_syncerrorslastsec
0}}}}} {status 1}

To return PCS lane results:

set results [::sth::forty_hundred_gig_l1_results -type "pcs_lane" -mode port]

Sample Output:

{result_count 2} {port1 {{port {{port_name {10.61.33.240-6-1 //6/1}}
{port_pcs_lane_index {}} {port_pcs_lane_bip8errorrate 0.0757749711314244}
{port_pcs_lane_bip8errors 54} {port_pcs_lane_bip8errorserr 18}
{port_pcs_lane_bip8errorslastsec 0} {port_pcs_lane_consecerrorrate
0.967853040360467} {port_pcs_lane_consecerrors 843}
{port_pcs_lane_consecerrorserr 199} {port_pcs_lane_consecerrorslastsec 0}
{port_pcs_lane_lengtherrorrate 0.17910447721973} {port_pcs_lane_lengtherrors 148}
{port_pcs_lane_lengtherrorserr 29} {port_pcs_lane_lengtherrorslastsec 0}
{port_pcs_lane_markererrorrate 7.37083810096584} {port_pcs_lane_markererrors
6420} {port_pcs_lane_markererrorserr 292} {port_pcs_lane_markererrorslastsec 0}
{port_pcs_lane_sherrorrate 18011.6107527504} {port_pcs_lane_sherrors 15688113}
{port_pcs_lane_sherrorserr 1375} {port_pcs_lane_sherrorslastsec 0}
{port_pcs_lane_syncerrorrate 7.33295061540012} {port_pcs_lane_syncerrors 6387}
{port_pcs_lane_syncerrorserr 2233} {port_pcs_lane_syncerrorslastsec 0}}}}}
{port2 {{port {{port_name {10.61.33.240-6-3 //6/3}} {port_pcs_lane_index {}}
{port_pcs_lane_bip8errorrate 0.440876076599943} {port_pcs_lane_bip8errors 295}
{port_pcs_lane_bip8errorserr 23} {port_pcs_lane_bip8errorslastsec 0}
{port_pcs_lane_consecerrorrate 0.289051202539035} {port_pcs_lane_consecerrors
190} {port_pcs_lane_consecerrorserr 22} {port_pcs_lane_consecerrorslastsec 0}
{port_pcs_lane_lengtherrorrate 0.267153384164866} {port_pcs_lane_lengtherrors
173} {port_pcs_lane_lengtherrorserr 20} {port_pcs_lane_lengtherrorslastsec 0}
{port_pcs_lane_markererrorrate 0.442335931158221} {port_pcs_lane_markererrors
296} {port_pcs_lane_markererrorserr 23} {port_pcs_lane_markererrorslastsec 0}
{port_pcs_lane_sherrorrate 271.496451475743} {port_pcs_lane_sherrors 185975}
{port_pcs_lane_sherrorserr 78} {port_pcs_lane_sherrorslastsec 0}
{port_pcs_lane_syncerrorrate 0.145985455827796} {port_pcs_lane_syncerrors 100}
{port_pcs_lane_syncerrorserr 78} {port_pcs_lane_syncerrorslastsec 0}}}}} {status 1}

To return PMA lane results:

set results [::sth::forty_hundred_gig_l1_results -type pma_lane -mode lanes]

Sample Output:

{result_count 2} {port1 {{lane {{0 {{port_pma_lane_bererrorrate 0.0}
{port_pma_lane_bererrors 0} {port_pma_lane_bersync 0} {port_pma_lane_berunsync
896} {port_pma_lane_rxprbspattern NONE}}} {1 {{port_pma_lane_bererrorrate 0.0}
{port_pma_lane_bererrors 0} {port_pma_lane_bersync 0} {port_pma_lane_berunsync
896} {port_pma_lane_rxprbspattern NONE}}} {2 {{port_pma_lane_bererrorrate 0.0}
{port_pma_lane_bererrors 0} {port_pma_lane_bersync 0} {port_pma_lane_berunsync
896} {port_pma_lane_rxprbspattern NONE}}} {3 {{port_pma_lane_bererrorrate 0.0}
{port_pma_lane_bererrors 0} {port_pma_lane_bersync 0} {port_pma_lane_berunsync
896} {port_pma_lane_rxprbspattern NONE}}} {4 {{port_pma_lane_bererrorrate 0.0}
{port_pma_lane_bererrors 0} {port_pma_lane_bersync 0} {port_pma_lane_berunsync
896} {port_pma_lane_rxprbspattern NONE}}} {5 {{port_pma_lane_bererrorrate 0.0}
{port_pma_lane_bererrors 0} {port_pma_lane_bersync 0} {port_pma_lane_berunsync
896} {port_pma_lane_rxprbspattern NONE}}} {6 {{port_pma_lane_bererrorrate 0.0}
{port_pma_lane_bererrors 0} {port_pma_lane_bersync 0} {port_pma_lane_berunsync
896} {port_pma_lane_rxprbspattern NONE}}} {7 {{port_pma_lane_bererrorrate 0.0}
{port_pma_lane_bererrors 0} {port_pma_lane_bersync 0} {port_pma_lane_berunsync
896} {port_pma_lane_rxprbspattern NONE}}} {8 {{port_pma_lane_bererrorrate 0.0}
{port_pma_lane_bererrors 0} {port_pma_lane_bersync 0} {port_pma_lane_berunsync
896} {port_pma_lane_rxprbspattern NONE}}} {9 {{port_pma_lane_bererrorrate 0.0}
{port_pma_lane_bererrors 0} {port_pma_lane_bersync 0} {port_pma_lane_berunsync
896} {port_pma_lane_rxprbspattern NONE}}}}}}} {port2 {{lane {{0
{{port_pma_lane_bererrorrate 0.0} {port_pma_lane_bererrors 0}
{port_pma_lane_bersync 0} {port_pma_lane_berunsync 710}
{port_pma_lane_rxprbspattern NONE}}} {1 {{port_pma_lane_bererrorrate 0.0}
{port_pma_lane_bererrors 0} {port_pma_lane_bersync 0} {port_pma_lane_berunsync
710} {port_pma_lane_rxprbspattern NONE}}} {2 {{port_pma_lane_bererrorrate 0.0}
{port_pma_lane_bererrors 0} {port_pma_lane_bersync 0} {port_pma_lane_berunsync
710} {port_pma_lane_rxprbspattern NONE}}} {3 {{port_pma_lane_bererrorrate 0.0}
{port_pma_lane_bererrors 0} {port_pma_lane_bersync 0} {port_pma_lane_berunsync
710} {port_pma_lane_rxprbspattern NONE}}} {4 {{port_pma_lane_bererrorrate 0.0}
{port_pma_lane_bererrors 0} {port_pma_lane_bersync 0} {port_pma_lane_berunsync
710} {port_pma_lane_rxprbspattern NONE}}} {5 {{port_pma_lane_bererrorrate 0.0}
{port_pma_lane_bererrors 0} {port_pma_lane_bersync 0} {port_pma_lane_berunsync
710} {port_pma_lane_rxprbspattern NONE}}} {6 {{port_pma_lane_bererrorrate 0.0}
{port_pma_lane_bererrors 0} {port_pma_lane_bersync 0} {port_pma_lane_berunsync
710} {port_pma_lane_rxprbspattern NONE}}} {7 {{port_pma_lane_bererrorrate 0.0}
{port_pma_lane_bererrors 0} {port_pma_lane_bersync 0} {port_pma_lane_berunsync
710} {port_pma_lane_rxprbspattern NONE}}} {8 {{port_pma_lane_bererrorrate 0.0}
{port_pma_lane_bererrors 0} {port_pma_lane_bersync 0} {port_pma_lane_berunsync
710} {port_pma_lane_rxprbspattern NONE}}} {9 {{port_pma_lane_bererrorrate 0.0}
{port_pma_lane_bererrors 0} {port_pma_lane_bersync 0} {port_pma_lane_berunsync
710} {port_pma_lane_rxprbspattern NONE}}}}}}} {status 1}